DP83840AVCE

DP83840AVCE, 10/100 Mb/s Ethernet Physical Layer, QFP, 7V, -50mA, National Semiconductor

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Price:: US $0.50~1.00 / piece [Get Latest Price]

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PartNumber:: DP83840AVCE

Brand:: National Semiconductor - NS | Pack: QFP | D/C: 97+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-10-09

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Part Number:DP83840AVCE
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Product Summary

The DP83840AVCE is a Physical Layer device for Ethernet 10BASE-T and 100BASE-X using category 5 Unshielded, Type 1 Shielded and Fiber Optic cables. This VLSI device is designed for easy implementation of 10/100 Mb/s Ethernet LANs. It interfaces to the PMD sublayer through the National Semiconductor’s DP83840AVCE Twisted Pair Transceiver, and to the MAC layer through a Media Independent Interface (MII), ensuring interoperability between products from different vendors.

Parametrics

DP83840AVCE absolute maximum ratings: (1)Supply Voltage (VCC): -0.5 V to 7.0 V; (2)Input Voltage (DCIN): -0.5 V to VCC + 0.5 V; (3)Output Voltage (DCOUT): -0.5 V to VCC + 0.5 V; (4)Storage Temperature: -65℃ to 150℃; (5)ECL Signal Output Current: -50mA; (6)ESD Protection: 2000 V.

Features

DP83840AVCE features: (1)IEEE 802.3 10BASE-T compatible--ENDEC and UTP/STP transceivers and filters built-in; (2)IEEE 802.3u 100BASE-X compatible--support for 2 pair Category 5 UTP (100m), Type 1 STP and Fiber Optic Transceivers--Connects directly to the DP83223 Twisted Pair Transceiver; (3)ANSI X3T12 TP-PMD compatible; (4)IEEE 802.3u Auto-Negotiation for automatic speed selection; (5)IEEE 802.3u compatible Media Independent Interface (MII) with Serial Management Interface; (6)Integrated high performance 100 Mb/s clock recovery circuitry requiring no external filters; (7)Full Duplex support for 10 and 100 Mb/s; (8)MII Serial 10 Mb/s output mode; (9)Fully configurable node and repeater modes--allows operation in either application; (10)Programmable loopback modes for easy system diagnostics; (11)Flexible LED support; (12)IEEE 1149.1 Standard Test Access Port and Boundary-Scan compatible; (13)Small footprint 100-pin PQFP package; (14)Individualized scrambler seed for multi-PHY applications.